Venue: 17th October 2023 at Hotel Bangi Resort, Selangor or 19th October 2023 at Eastin Hotel, Penang
The Semiconductor Advanced Packaging Workshop is the biennial event providing participant an opportunity to meet and learn from two IEEE renowned speakers who will be sharing their expertise in the most recent packaging trends and development of emerging technologies. This event is organized by the IEEE EPS Malaysia Chapter.
Title 1: “ Material and Process Trends in Fan-out WLP and PLP ”
by Dr. Tanja Braun
Group Manager Fraunhofer IZM Berlin, Germany
Fan-out Wafer and Panel Level Packaging are gaining relevance as mass compatible advanced packaging technologies. Providing technical advantages and optimized cost for manifold applications, FOWLP and PLP are fundamentally changing the packaging infrastructure. In the past OSATs dominated high volume manufacturing, but recently new players in packaging as semiconductor foundries, PCB or LCD manufacturing companies entered this business area and are changing not only supply chains but also form factors towards larger areas. However, materials are playing an import role especially for future applications as RF, power or advanced computing applications. In additions materials are also a key factor for cost and sustainability.
In summary the presentation will discuss recent technical developments as well as the changing ecosystem and actual advantages and challenges when moving to large panel level manufacturing.
Title 2: “ Exploring Chiplets and the New Era of Advanced Packaging ”
by E. Jan Vardaman
President and Founder, TechSearch International, Inc.
As the industry enters the new era of heterogeneous integration, advanced packaging in the form of chiplets is becoming increasingly important. An increasing number of companies are turning to chiplets to achieve the economic advantages lost with expensive monolithic scaling, ushering in a new era of smart packaging. A chiplet is not a package, but it is a new approach to system, package, and chip design. There are many package options and careful consideration is required to select the most appropriate options for the application. Options include the emerging 3DIC format with mircobumps or hybrid bonding, laminate substrate package, fan-out on substrate, and silicon interposer. Challenges include design, test, assembly, and thermal. This seminar defines chiplets and provides examples of the applications and package types in use today and what is expected for the future. Packaging challenges are highlighted and areas that require future work are documented.
Title 3: “ Automotive Packaging Trends”
by E. Jan Vardaman
President and Founder, TechSearch International, Inc.
The automotive sector continues to grow and the electronic content per vehicle is increasing. The move to electric vehicles (EV) is driving adoption of wide band gap materials and new packages. Power devices are increasingly important, and new form factors including embedded structure are being adopted for these applications. Many packages are leadframe-based packages. QFN remains the workhorse of the industry. Demand for Cu clip packages is increasing. What are the package choices for these application areas and how are the options changing? What infrastructure and material challenges does the industry face? This presentation discusses these growth drivers and packaging trends.
