Venue: 15th October 2025 at G Hotel Gurney, Penang or 17th October 2025 at Bangi Resort Hotel, Selangor
The Semiconductor Advanced Packaging Workshop is the biennial event providing participant an opportunity to meet and learn from two IEEE renowned speakers who will be sharing their expertise in the most recent packaging trends and development of emerging technologies. This event is organized by the IEEE EPS Malaysia Chapter.
This workshop is HRDF claimable
Workshop Session 1: “Introduction to and Advances in 2.5D Fan-Out Wafer & Panel Level Packaging ”
by Dr. Beth Keser
BETH KESER, Ph.D. is a recognized global leader in the semiconductor industry with over 27 years of advanced packaging experience who has been enabling the chiplet ecosystem through heterogeneous integration for over a decade. Beth has received her B.S. in Materials Science and Engineering from Cornell University and her Ph.D. from the University of Illinois. Beth’s excellence in developing revolutionary electronic packages for semiconductor devices has resulted in 50 US patents and patents pending and over 50 publications.
Dr. Beth has worked in advanced packaging leadership roles at Motorola, Qualcomm and Intel and is currently VP of Packaging at Volantis Semi, a photonics start-up. She is also an IEEE Fellow and was General Chair of ECTC in 2015. Dr. Beth was the President of the International Microelectronics Assembly and Packaging Society (IMAPS) from 2021-2023 and is currently Past President.
Dr. Beth has published two edited volumes: "Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Applications Spaces" (Wiley, 2021) and "Advances in Embedded and Fan-Out Wafer Level Packaging Technologies" (Wiley, 2019). In 2021, Dr. Beth received the IEEE EPS Exceptional Technical Achievement Award for contributions in the field of Fan-Out Wafer Level Packaging.
ABSTRACT
This workshop provides an overview of 2.5D and 3D Fan-Out Wafer and Panel Level Packaging technologies, focusing on their fundamentals, recent advancements, and applications in advanced semiconductor packaging. Participants will gain insights into the design, materials, and manufacturing processes that enable higher performance, miniaturization, and integration in modern electronic devices.
Workshop Session 2: “Package Reliability Management ”
by Dr. Lee Teck Kheng
Dr. Lee Teck Kheng earned his Ph.D. in Mechanical and Aerospace Engineering from Nanyang Technological University (NTU), Singapore, in 2006. He brings over 28 years of experience in the semiconductor industry and more than 25 years in academia, management, and business across university and vocational education sectors. His career includes leadership roles at Texas Instruments, the Institute of Microelectronics, Micron Technology, A*STAR, and other multinational corporations.
He founded the Technology Development Centre at ITE College Central, where he leads multidisciplinary engineering teams aligned with Singapore’s national Research, Innovation, and Enterprise (RIE) agenda. Dr. Lee also plays a key role in international standards development as co-convener of IEC Technical Committee 47 and serves as a Singapore Accreditation Council (SAC) assessor. He has held advisory roles with SEMI, SCCCI, SSIA, IES, and EPTC, and is a member of the Industry Advisory Board for the College of Engineering, Science and Environment (CESE), University of Newcastle, Australia.
A prolific innovator and educator, Dr. Lee holds over 150 U.S. patents—many commercialized—and has published more than 80 papers. He has conducted over 100 international workshops and served on the advisory board of QDOS Flexcircuits Sdn Bhd. He is currently a consultant at NTU, where he teaches semiconductor failure analysis and provides specialized training in semiconductor packaging. His achievements have earned him numerous recognitions, including the IEC 1906 Award (2023) and the SICC Award (2022).
ABSTRACT
This course offers a practical introduction to package reliability management in the semiconductor industry. Aimed at professionals across disciplines, it highlights how design and material choices impact reliability. The session begins with an overview of reliability testing and standards, followed by a deep dive into common failure mechanisms under mechanical, electrical, and chemical stress. Participants will explore thermo-mechanical, chemical, and electrical failure modes, and learn to apply failure analysis tools to investigate and address these issues. Designed for directors, managers, process and R&D engineers, the course is also valuable for sales and application engineers, providing insights into key reliability challenges and helping drive more informed decisions in packaging design and materials.
Buy 5, Get 1 Free!
Free seat applies to the lowest-priced item.
for group registration ≥5 pax, kindly contact [email protected]
For any questions, please feel free to email us at [email protected].
